Yi-Shin LinSenior Staff Engineer. ASIC/System Verification and Modeling/FPGA Emulation
Annandale, New Jersey
Senior Staff Engineer. ASIC/System Verification and Modeling/FPGA Emulation
Senior Staff ASIC/IC Design and Verification Engineer
IC Test Engineer
Binghamton University
Feng Chia University
Ming-Dao High School
Recommendations: 7
DFT
ASIC
Verilog
IC
Static Timing Analysis
Spyglass
SoC
Debugging