Top SMTS in Austin, Texas
Quentin Conner
Engineering Lead, Driver Performance and Quality
Austin, Texas
Engineering Lead, Driver Performance and Quality
Managing Director of Engineering
Technical Director
Developer
Software Engineer
Software Architect
Development Engineer
Director, Platform Development
SMTS, Server Power and Performance Optimzation
University of Southern California
Recommendations: 43
Cloud Computing
SaaS
Enterprise Software
Unix
Software Development
Java
Databases
SOA
q****[email protected]
Hooi-Min Lim
SMTS System Design Engineer
Austin, Texas
SMTS System Design Engineer
Equipment Engineer
Coventry University
Recommendations: 12
Verilog
Microprocessors
Hardware Design
Processors
Debugging
Computer Architecture
FPGA
Xilinx
s****[email protected]
h****[email protected]
Douglas Lane
Engineering Technician
Austin, Texas
Engineering Technician
Associate PWB Designer / In-Circuit Test Engineer
Senior Pre-Silicon Design Verification Engineer
Hardware / Pre-Silicon Design Verification Engineer
Software / Hardware Engineer
Test Engineer
SMTS Systems Design Eng
Design Verification Engineer
Texas State University-San Marcos
Recommendations: 2
DFX
DFT
OVM
Debugging
SystemVerilog
SoC
Perl
C++
d****[email protected]
Raghuram Tupuri
Sr. Director - Silicon Design
Austin, Texas
Sr. Director - Silicon Design
VP Engineering
SMTS
VP Global Engineering
Director - Design
Designer
Adjunct Faculty
Corporate Vice President - Silicon Design
Recommendations: 1
SoC
ASIC
Computer Architecture
Semiconductors
VLSI
Verilog
Silicon
Circuit Design
r****[email protected]
r****[email protected]
pavan sayana
Design Verification Engineer
Austin, Texas
Design Verification Engineer
Senior verification engineer(Verification consultant @ Qualcomm)
Manager Engineering ( verification consulatant @ Samsung)
SMTS (Verification Consultant @ Qualcomm)
Senior Design Verification Engineer
Senior Verification Engineer(verification consultant @ NXP)
Engineer
Recommendations: 1
SystemVerilog
ModelSim
Perl
Verilog
ASIC
Functional Verification
RTL design
Debugging
s****[email protected]
Tendy The
Embedded/Electronic Engineer
Austin, Texas
Embedded/Electronic Engineer
Staff Design Engineer
SMTS Prod. Dev Engineer (SoC/Logic/RTL)
Staff Design Engineer
Principal Design Engineer
Staff Design Engineer (MTS)
Senior RTL Design Engineer
University of Auckland
University of Auckland School of Engineering
Recommendations: 0
Static Timing Analysis
IC
ASIC
VHDL
FPGA
Logic Design
RTL design
Logic Synthesis
p****[email protected]
t****[email protected]
Rahul Toley
CPU/Cache Microarchitect
Austin, Texas
CPU/Cache Microarchitect
Coherency Microarchitect / Design Engineer
SMTS CPU microarchitect
Sr. Design Engineer
Senior Design Engineer
Microprocessor architect
Georgia Institute of Technology
Vishwakarma Institute of Technology
The University of Texas at Austin
Recommendations: 0
r****[email protected]
Albert Danysh
IC Logic Design
Austin, Texas
IC Logic Design
IC Design
MTS Design Engineer
IC Design
Principal Engineer
SMTS Engineer
The University of Texas at Austin
The University of Texas at Austin
Recommendations: 0
Physical Design
RTL design
Static Timing Analysis
Verilog
VLSI
Microprocessors
Logic Design
Computer Architecture
a****[email protected]
a****[email protected]
Guoqing Chen
Physical Design Engineer
Austin, Texas
Physical Design Engineer
Physical Design Lead
Research Assistant
SMTS
Physical Design Engineer
University of Rochester
Tsinghua University
Tsinghua University
Recommendations: 0
Static Timing Analysis
CMOS
SPICE
IC
Microprocessors
EDA
Semiconductors
Logic Synthesis
g****[email protected]
Steve Vu
SMTS
Austin, Texas
SMTS
Digital RTL Design Engineer
MGTS Digital Design Engineer
Design/Test/Product Engineer
Senior Member of the Technical Staff
Senior Designer
Test/Product Engineer
ASIC Design Engineer
Texas A&M University
Recommendations: 0
ASIC
Verilog
Electrical Engineering
RTL design
IC
s****[email protected]
Tom Mickelson
SMTS
Austin, Texas
SMTS
Senior Member Of Technical Staff
Senior Technical Staff
Sr. Manager Design Engineering
Staff Engineer
Sr Staff
Physical Design Engineer
University of Illinois at Urbana-Champaign
Recommendations: 0
SoC
RTL design
Physical Design
Static Timing Analysis
ASIC
Logic Design
Verilog
Timing Closure
t****[email protected]
Anmol Paralkar
Senior Software Engineer
Austin, Texas
Senior Software Engineer
LLVM/Clang Compiler Engineer
Senior Software Engineer
SMTS
Software Development Engineer
Software Engineer
Technical Leader, Engineering
Lead Engineer
Software Engineer
R & D Engineer
University of Pune
University of Mumbai
D. G. Ruparel College, Mumbai
Recommendations: 0
Richard Bryant
Senior Staff Engineer
Austin, Texas
Senior Staff Engineer
Principal Hardware Engineer
SMTS Design Engineer
MTS Design Engineer
Senior Design Engineer
Design Engineer
The University of Texas at Austin
Recommendations: 0
