Top Senior Staff Engineers in Austin, Texas
Steve Hand
Developer Software Lead and Architect
Austin, Texas
Developer Software Lead and Architect
Technical Services Engineer
Cloud Architect
Principal Engineer
Technical Writer
Senior Staff Engineer
Member of Technical Council
Cloud Architect
Senior Software Engineer
Technical Director of SMILab
Advisory Engineer
Owner
University of Connecticut
Keene State College
Keene State College
Recommendations: 9
Java
C++
HTML
JSP
XML
XSD
Servlets
Storage
s****[email protected]
Luai Abou-Emara
Principal Physical Design Engineer
Austin, Texas
Principal Physical Design Engineer
Senior Staff Engineer
Walden University
University of Washington
Recommendations: 6
Physical Design
Timing Closure
TCL
Perl
Low-power Design
Primetime
EDI
Redhawk
l****[email protected]
Sridhar Gudibanda
Senior Staff Engineer/Manager
Austin, Texas
Senior Staff Engineer/Manager
Staff Engineer/Manager
Staff Engineer
Senior Hardware Engineer
Design Verification Engineer
Component Design Engineer
Design Engineer
DAAD Exchange Student
Indian Institute of Technology, Kharagpur
National Institute of Technology Warangal
Technische Universität Berlin
Recommendations: 5
FPGA
Debugging
SystemVerilog
GPU
OpenCL
DirectX
OpenGL
OVM/VMM/RVM
s****[email protected]
Kyle Mendes
Senior Web Developer
Austin, Texas
Senior Web Developer
Seasonal Help
Lead Frontend Developer
Cashier
Senior Staff Engineer
Front End Web Developer
Director of Engineering
Frontend Lead
Peer Mentor
University of Massachusetts, Amherst
Nashoba Regional High School
Recommendations: 1
CSS
HTML
SASS
jQuery
Student Affairs
Tutoring
Community Outreach
Proofreading
p****[email protected]
Arnab Dutta
Senior Staff Engineer
Austin, Texas
Senior Staff Engineer
Associate Staff Design Engineer
Student
Analog Design Engineer 2
Teaching Assistant
Product Engineer Intern
Staff Engineer
Hardware Engineer(Analog)
Analog Design Engineer 3
Senior Analog/Mixed Signal Design Engineer
Hardware Engineer
Student
The University of Texas at Austin
IIT Kharagpur
Recommendations: 1
Mixed Signal
Circuit Design
SPICE
Logic Design
Cadence Virtuoso
Verilog
Low-power Design
Matlab
a****[email protected]
Dmitry Drachov
Senior Product and Test Engineer
Austin, Texas
Senior Product and Test Engineer
Senior Staff Engineer, PTE
Senior Staff Product and Test Engineer
Product and Test Engineer
Customer Support Program Manager
Product Engineer
Belaruski Dzjaržauny Universitet Informatyki i Radyjoelektroniki
Belarusian State University of Informatics and Radioelectronics
Recommendations: 1
Systems Engineering
Assembly
DFT
Silicon
Semiconductors
ATPG
BIST
Testing
d****[email protected]
Siva Bonasu
Staff Engineer-ASIC
Austin, Texas
Staff Engineer-ASIC
Senior Design Engineer
Design Engineer
CO-OP
Digital Design Engineer
Senior Staff Engineer
Arizona State University
Jawaharlal Nehru Technological University
Recommendations: 0
ASIC
Verilog
VHDL
Digital Signal Processors
SystemVerilog
Matlab
Audio Design
Mixed Signal
i****[email protected]
b****[email protected]
Eric Quinnell
CPU uArchitect
Austin, Texas
CPU uArchitect
Principal Engineer
Senior Staff Engineer
Staff Engineer
Floating-Point Architect
Physical Design/Implementation Engineer
The University of Texas at Austin
Recommendations: 0
RTL design
Verilog
Physical Design
Logic Synthesis
Floating-Point
Computer Arithmetic
Computer Architecture
Low-power Design
e****[email protected]
e****[email protected]
Seth Herstad
Member of Technical Staff
Austin, Texas
Member of Technical Staff
Senior Staff Engineer
Senior Engineer
Design Engineer 2
Teaching Assistant in ECE department
Student Employee in Office of Student Financial Aid
Intern
Co-op with Systems Engineering Group
Co-op with Technical Assistance Center
University of Illinois at Urbana-Champaign
University of Illinois at Urbana-Champaign
Recommendations: 0
SystemVerilog
Perl
Verilog
C++
Functional Verification
RTL verification
Computer Architecture
Microprocessors
s****[email protected]
f****[email protected]
Rakesh Vattikonda
Research Intern
Austin, Texas
Research Intern
Design Manager
Technical Manager
Senior Staff Engineer/Manager
Staff Engineer
Indian Institute of Technology, Guwahati
Arizona State University
Recommendations: 0
Static Timing Analysis
Verilog
ASIC
VLSI
EDA
Cadence Virtuoso
RTL design
IC
r****[email protected]
Ross Scouller
Distinguished Innovator
Austin, Texas
Distinguished Innovator
Senior Member of the Technical Staff
Senior Member of the Technical Staff
Senior Member of the Technical Staff
Senior Member of the Technical staff
Team Leader
Project Leader
Project Leader
Technical Staff Engineer
Senior Staff Engineer
Design Engineer
Staff Designer
Senior Member Of Technical Staff
Berkley, NTU
The University of Dundee
University of Paisley
Recommendations: 0
Debugging
DFT
Embedded Systems
Firmware
SoC
RTL design
ASIC
IC
r****[email protected]
Bill Maghielse
Senior Principal Design Engineer
Austin, Texas
Senior Principal Design Engineer
Senior Director, Worldwide System IP
Design Engineer
Staff Engineer
Senior Director, Interconnect and Tooling IP Engineering
Director, System IP Engineering
Senior Staff Engineer
Recommendations: 0
Verilog
RTL design
ASIC
SoC
Processors
Microprocessors
Static Timing Analysis
ARM
b****[email protected]
Peng Yang
Hardware Design Engineer
Austin, Texas
Hardware Design Engineer
Senior Staff Engineer
Senior Engineer
CPU and SoC Low Power Lead
Principal Engineer
Design Engineer
KU Leuven
Tsinghua University
Fudan University
Recommendations: 0
SoC
Computer Architecture
o****[email protected]
Vasu Iyer
Principal Engineer and Technical Lead
Austin, Texas
Principal Engineer and Technical Lead
Senior Design Engineer
IC Designer
Project lead
Senior Design Engineer
Director - GPU
Member of Technical Staff
Senior Hardware Engineer
Senior Staff Engineer
University of Louisiana at Lafayette
Osmania University
Recommendations: 0
Physical Design
VLSI
Low-power Design
SoC
RTL design
ASIC
Verilog
Functional Verification
v****[email protected]
Krishna Gopinathannair
ASIC physical design engineer
Austin, Texas
ASIC physical design engineer
Asic physical design Engineer
Senior Staff Engineer
ASIC Design Lead
University of Florida
Recommendations: 0
Physical Design
CMOS
ASIC
Verilog
Floorplanning
DFT
Timing
TCL
k****[email protected]
Woo Kim
Senior Staff Engineer
Austin, Texas
Senior Staff Engineer
Member of Technical Staff
Circuit Designer
Senior Design Engineer
Northeastern University
Yonsei University
Yonsei University
Recommendations: 0
ASIC
Static Timing Analysis
VLSI
Logic Synthesis
Digital Signal...
Logic Design
Physical Design
Timing
w****[email protected]
t****[email protected]
Ram Vuta
SoC Design Verification Engineer
Austin, Texas
SoC Design Verification Engineer
Senior Staff Engineer/Manager
Senior Verification Engineer
Senior Design Engineer
Component Design Engineer
Indian Institute of Technology, Kharagpur
Nagarjuna University
Recommendations: 0
r****[email protected]
r****[email protected]
Donny Yi
Senior Member Of Technical Staff - Power Management Architect
Austin, Texas
Senior Member Of Technical Staff - Power Management Architect
Senior Staff Engineer
Advanced Development Engineer
Media Engineer
Software Engineer
High Speed I/O
Georgia Institute of Technology
Northeastern University
Columbia University in the City of New York
Recommendations: 0
Analog
C++
Linux
Signal Integrity
Post-silicon validation
Perl
Agile Project Management
ATE
d****[email protected]
Steve Thompson
Sr Enginer II
Austin, Texas
Sr Enginer II
Consultant
Senior Software Developer Team Lead
Senior Staff Engineer
Senior Developer
Enterprise Integration Consultant
Software Architect
University of Calgary
Recommendations: 0
ADO.NET
ASP.NET
Cloud Computing
Microsoft Office Sharepoint Server
Software Engineering
.NET
SOA
T-SQL
s****[email protected]
Marivic Maranon
Analog Layout Engineer
Austin, Texas
Analog Layout Engineer
Senior Layout Engineer
Layout Engineer
Staff Physical Design Engineer/ Full Custom Analog IC Layout Design Engineer
Senior Staff Engineer
Mapua Institute of Technology
Recommendations: 0
Tung Pham
Senior Staff Engineer
Austin, Texas
Senior Staff Engineer
Principal Application & Consulting Engineer
Sr. Staff Engineer. Led synthesis and physical design to deliver Vector Processing and CPU cores
Design Engineer
Sr/Staff Engineer. Led block synthesis/physical design, Verilog gate model, validation, simulation
The University of Texas at Austin
Recommendations: 0
Richard Bryant
Senior Staff Engineer
Austin, Texas
Senior Staff Engineer
Principal Hardware Engineer
SMTS Design Engineer
MTS Design Engineer
Senior Design Engineer
Design Engineer
The University of Texas at Austin
Recommendations: 0
