Top Senior Hardware Engineers in Santa Clara, California
Pradeep Subramanyam
Design Verification Engineer
Santa Clara, California
Design Verification Engineer
Design Verification Engineer II
Teaching Associate
Research Engineer
Software Engineer
Senior Hardware Engineer
Senior Design Verification Engineer
California State University-Chico
Visvesvaraya Technological University
Recommendations: 8
C
C++
VHDL
Software Quality Assurance
Programming
Perl
Matlab
x86 Assembly
p****[email protected]
Fengming Zhang
Hardware Design Internship
Santa Clara, California
Hardware Design Internship
Principal Physical Design Engineer
Senior Hardware Engineer
Senior Member of Technical Staff
Member of Technical Staff
Hardware Design Engineer
Hardware Design Engineer
Senior Technical Leader
Principal Hardware Engineer
Northeastern University
Beijing University of Chemical Technology
Beijing University of Chemical Technology
Recommendations: 3
Verilog
EDA
SPICE
Static Timing Analysis
Physical Design
Microprocessors
CMOS
Cadence
z****[email protected]
f****[email protected]
Jithin Sankar
Hardware Engineer
Santa Clara, California
Hardware Engineer
Emulation engineer(consultant)
Senior Hardware Engineer
FPGA Engineer
FPGA Consultant
Research Student
The University of Western Australia
RMIT University
Visvesvaraya Technological University
Recommendations: 3
VHDL
Perl
Verilog
RTL design
FPGA
ASIC
Xilinx
ModelSim
j****[email protected]
j****[email protected]
Kevin Kuhn
Contract Mask Designer
Santa Clara, California
Contract Mask Designer
Contract Mask Layout Designer
Mask Designer
Senior Layout Designer
IC Layout Mask Designer
Member of Technical Staff
Mask Designer
Senior Hardware Engineer
mask designer
Stanford University
Recommendations: 2
VLSI
Physical Design
Floorplanning
Digital Layout
Analog Layout
SRAM Layout
Standard Cell Layout
Top Level Clock/Power Design
k****[email protected]
Sohini Bandyopadhyay
NVM Intern
Santa Clara, California
NVM Intern
ASIC Verification Engineer
Design Verification Engineer
Senior Hardware Engineer
ASIC Design Intern
Sr. ASIC Design Verification Engineer
Texas A&M University
National Institute of Technology Rourkela
Delhi Public School
Recommendations: 0
C
C++
VLSI
Matlab
Perl
Processors
Verilog
Debugging
s****[email protected]
Tayo Fadelu
Hardware Developer
Santa Clara, California
Hardware Developer
Senior Hardware Engineer
University of Southern California
Baylor University
Recommendations: 0
Computer Architecture
ModelSim
Cadence Virtuoso
Verilog
RTL design
VHDL
ASIC
Embedded Systems
f****[email protected]
t****[email protected]
Evan Richards
Engineer 2, Optical Systems
Santa Clara, California
Engineer 2, Optical Systems
Optical Systems Engineer Manager
Senior Hardware Engineer, Google[x]
Laboratory Assistant at the Optical Detection Lab
Student Assistant Optician at the Steward Observatory Mirror Lab
University of Arizona
University of Arizona
Recommendations: 0
Sensors
Zemax
Optical Engineering
Image Processing
Optics
Matlab
Systems Engineering
LIDAR
e****[email protected]
Ameya Vaidya
Chief Co-ordinator
Santa Clara, California
Chief Co-ordinator
Summer Intern
Senior Hardware Engineer
Senior Hardware Engineer
Harvard Business School Online
Cornell University
VJTI
Recommendations: 0
Computer Architecture
RTL design
Digital Circuit Design
Athena
VHDL
Verilog
VLSI
Integrated Circuit Design
a****[email protected]
Oliver Bowen
Principal Digital Designer
Santa Clara, California
Principal Digital Designer
Project Electrical Engineer
Intern
Senior Hardware Engineer
Senior Hardware Engineer
VLSI Design Engineer
Digital Systems Engineer
Digital Design Engineer
Imperial College London
Lafayette College
Recommendations: 0
FPGA
Verilog
VHDL
C
Xilinx
Matlab
C++
Python
o****[email protected]
Aaron O'Brien
Senior Hardware Engineer
Santa Clara, California
Senior Hardware Engineer
Senior Systems Application Engineer
Senior Hardware Engineer
Hardware Test Engineer
Hardware Design Engineer
Hardware Design Engineer
Hardware Engineer
CIA Engineering Student Intern
California State University, Chico
Recommendations: 0
a****[email protected]
Yu Shan
ASIC engineer
Santa Clara, California
ASIC engineer
Member of Technical Staff
Senior Staff Design Verification engineer
Senior Hardware Engineer
Senior ASIC engineer
Senior Hardware Engineer/Team Lead
Tsinghua University
Tsinghua University
Recommendations: 0
ASIC
Computer Architecture
RTL design
SystemVerilog
Verilog
Debugging
Functional Verification
FPGA
e****[email protected]
Samson Joseph
Hardware Engineer
Santa Clara, California
Hardware Engineer
Senior Hardware Engineer
Graduate Teaching Assistant
University of California, Santa Barbara
Anna University
Recommendations: 0
Embedded Systems
Embedded C
Matlab
Verilog
C
C++
Simulations
Perl
s****[email protected]
Jithin Sankar
Senior FPGA Engineer
Santa Clara, California
Senior FPGA Engineer
Senior Hardware Engineer
Member Technical Staff
FPGA Engineer
Senior Hardware Engineer
Design Eng.
Senior Hardware Engineer
The University of Western Australia
RMIT University
Visvesvaraya Technological University
Recommendations: 0
j****[email protected]
j****[email protected]
Priyanka Sadananda
Hardware Engineer
Santa Clara, California
Hardware Engineer
Research Assistant
Research Assistant
student
Senior Hardware Engineer
Georgia Institute of Technology
Vellore Institute of Technology
Recommendations: 0
Digital Signal Processing
Digital Image Processing
Machine Learning
C/C++
Matlab
Computer Architecture
Embedded Systems
Verilog
Ziyao Xu
ASIC Design Intern
Santa Clara, California
ASIC Design Intern
Senior Hardware Engineer
Hardware Design Engineer
Staff Engineer
Senior Firmware Engineer
Columbia University in the City of New York
Nanjing University of Aeronautics and Astronautics
Jinling High School
Recommendations: 0
John DeBusscher
Senior Hardware Engineer
Santa Clara, California
Senior Hardware Engineer
Senior Hardware Design Engineer
Project Manager Team Lead
Electrical Engineer
Engineering Intern
Senior Electrical Design Engineer
University of Southern California Viterbi School of Engineering
University of Michigan College of Engineering
Recommendations: 0
Yiou Li
Senior Hardware Engineer
Santa Clara, California
Senior Hardware Engineer
Senior Principal Hardware Engineer
Principal Hardware Engineer
Duke University
Duke University
Recommendations: 0
Perl
System Architecture
SPARC
X86
Solaris
Unix
Verilog
Embedded Systems
