Paul CheungSr ASIC Design Engineer
Union City, California
Sr ASIC Design Engineer
Design Manager / Project Lead
Project Manager
Sr. RTL Design Engineer (Altran Contractor)
Senior FPGA Design Engineer(ATR Contractor)
FPGA Design Engineer
Senior ASIC Design Engineer
Design Consultant
Member of Technical Staff
Senior FPGA Design Engineer
The University of Texas at El Paso
Recommendations: 0
ASIC
FPGA
USB
Semiconductors
SoC
Engineering Management
Verilog
EDA