Top Hardware Engineers in Santa Clara, California

Pradeep Subramanyam
Design Verification Engineer
Santa Clara, California
Design Verification Engineer
Design Verification Engineer II
Teaching Associate
Research Engineer
Software Engineer
Senior Hardware Engineer
Senior Design Verification Engineer
California State University-Chico
Visvesvaraya Technological University
Recommendations: 8
C
C++
VHDL
Software Quality Assurance
Programming
Perl
Matlab
x86 Assembly
Frank Wu
Senior Electrical Engineer | Project Manager
Santa Clara, California
Senior Electrical Engineer | Project Manager
Senior Electrical Engineer
Hardware Design Engineer
Senior Staff Hardware Engineer
Senior Electrical Engineer
San Jose State University
Hunan University
Hunan University Affiliated Middle School
Recommendations: 7
Embedded Systems
PCB Design
Testing
Electronics
Hardware Architecture
Manufacturing
Analog
Wireless
Ratnendra Pandey
IC Design Engineer
Santa Clara, California
IC Design Engineer
Hardware Engineer
Guest Lecturer
Project Associate
Member of Technical Staff
Applications Engineer
Silicon Design Engineer
Design Consultant RTL-Physical Design
Physical Design Engineer
Staff Corporate Application Engineer
San Jose State University
South Dakota State University
Punjab Engineering College
Recommendations: 3
ASIC
Static Timing Analysis
RTL design
TCL
Verilog
EDA
Debugging
Semiconductors
Fengming Zhang
Hardware Design Internship
Santa Clara, California
Hardware Design Internship
Principal Physical Design Engineer
Senior Hardware Engineer
Senior Member of Technical Staff
Member of Technical Staff
Hardware Design Engineer
Hardware Design Engineer
Senior Technical Leader
Principal Hardware Engineer
Northeastern University
Beijing University of Chemical Technology
Beijing University of Chemical Technology
Recommendations: 3
Verilog
EDA
SPICE
Static Timing Analysis
Physical Design
Microprocessors
CMOS
Cadence
Jithin Sankar
Hardware Engineer
Santa Clara, California
Hardware Engineer
Emulation engineer(consultant)
Senior Hardware Engineer
FPGA Engineer
FPGA Consultant
Research Student
The University of Western Australia
RMIT University
Visvesvaraya Technological University
Recommendations: 3
VHDL
Perl
Verilog
RTL design
FPGA
ASIC
Xilinx
ModelSim
Pathik Gohil
Hardware Test Engineer
Santa Clara, California
Hardware Test Engineer
Hardware Engineer
Silicon Validation Engineer
Hardware and Test Engineer
Design and Test Engineer
ASIC Engineer Intern
Santa Clara University
Nirma University
Recommendations: 2
Verilog
ASIC
C, C++
Labview
FPGA
RTL design
Timing Closure
Primetime
Sudarshan Vempati
Senior Verification Engineer
Santa Clara, California
Senior Verification Engineer
Graphics Hardware Engineer
Product Integration Engineer
Senior Software Engineer (Contractor through Wipro Inc.)
Independent Research (VLSI Testing and Verification)
Research Assistant (Volunteer)
Embedded Software Engineer (Automotive Domain)
Research Intern
University of Florida
Ramrao Adik Institute of Technology, University of Mumbai
AEJC
ST.Lawrence High School
Recommendations: 2
Verilog
VHDL
Embedded Software
Device Drivers
Embedded Systems
Perl Script
SystemVerilog
Computer Architecture
Kevin Kuhn
Contract Mask Designer
Santa Clara, California
Contract Mask Designer
Contract Mask Layout Designer
Mask Designer
Senior Layout Designer
IC Layout Mask Designer
Member of Technical Staff
Mask Designer
Senior Hardware Engineer
mask designer
Stanford University
Recommendations: 2
VLSI
Physical Design
Floorplanning
Digital Layout
Analog Layout
SRAM Layout
Standard Cell Layout
Top Level Clock/Power Design
Alex Busch
Supplier Quality & Reliability Engineer, Optics
Santa Clara, California
Supplier Quality & Reliability Engineer, Optics
Reliability Engineer, Silicon Photonics Solutions Group
Hardware Engineer - Quality & Field Escalations Manager, Transceiver Module Group
Senior Product Verification & Test Engineer
Quality & Reliability Engineer (Optical)
Photonics Specialist
The University of British Columbia
The University of British Columbia
McMaster University
Recommendations: 1
Testing
Reliability
Characterization
Optical Fiber
RF
Semiconductors
Fiber Optics
Analog
Jae Choi
Senior Digital Engineer
Santa Clara, California
Senior Digital Engineer
Hardware Engineer
Sr. Hardware engineer
ASIC FPGA Engineer, (SOC design)
University of Illinois at Urbana-Champaign
Recommendations: 1
ASIC
Hardware Architecture
Simulations
RTL design
FPGA
Verilog
Hardware
VIRUPAKSHAIAH ITTIGIMATH
M.S in Electrical Engineering
Santa Clara, California
M.S in Electrical Engineering
Student Assistant
Hardware Engineer
Signal Integrity Engineering
Hardware Engineer
Senior Electrical Engineer
San Jose State University
Visvesvaraya Technological University
Recommendations: 1
Cadence Virtuoso
Verilog
IC
ASIC
Simulations
CMOS
Digital Electronics
Cadence
Navin Mohan
Application Engineer
Santa Clara, California
Application Engineer
Hardware Engineer
Intern - Hardware Engineering (Analog)
Staff Design Engineer
Silicon Architect Engineer (ASIC Design and Verification)
Analog Engineer/Component Design Engineer
Teaching Assistamt
SOC/ASIC Design Engineer
Arizona State University
Birla Institute of Technology and Science, Pilani
Sankara Vidhyalaya School
Recommendations: 1
VLSI
Verilog
Jay Shah
Network/Service Assurance Engineer
Santa Clara, California
Network/Service Assurance Engineer
Wireless/RF System Engineer
MTS | Hardware Engineer
University of Southern California
University of Mumbai
Recommendations: 1
Cadence
Networking
Microprocessors
C
PCB design
Integrated Circuit Design
C++
Analog Circuit Design
Pushpender Singh
Software Engineer
Santa Clara, California
Software Engineer
Technical Support Engineer
Hardware Engineer
Network Engineering Intern.
Global Competition Finalist
San Jose State University
California State University-Long Beach
Amity University
Recommendations: 1
VHDL
Troubleshooting
Circuit Design
Matlab
C
Assembly Language
C++
Solidworks
Ashwin Badrinarayanan
MTS Applications
Santa Clara, California
MTS Applications
Senior MTS: Applications
Intern - RF Hardware Design Engineer
Contractor - RF Hardware Engineer
Associate MTS Applications
Hardware Development Intern
The University of Texas at Dallas
SASTRA University
Recommendations: 1
SPICE
SoC
Spectre
PCB design
Cadence
Circuit Design
RF
Low-power Design
Jade Deng
Hardware Design Engineer (Co-op)
Santa Clara, California
Hardware Design Engineer (Co-op)
Hardware Engineer
University of Waterloo
Ecole polytechnique fédérale de Lausanne
Recommendations: 0
PCB Design
Cadence
VHDL
Verilog
Agilent ADS
Matlab
Hardware Testing
Python
Sohini Bandyopadhyay
NVM Intern
Santa Clara, California
NVM Intern
ASIC Verification Engineer
Design Verification Engineer
Senior Hardware Engineer
ASIC Design Intern
Sr. ASIC Design Verification Engineer
Texas A&M University
National Institute of Technology Rourkela
Delhi Public School
Recommendations: 0
C
C++
VLSI
Matlab
Perl
Processors
Verilog
Debugging
Tayo Fadelu
Hardware Developer
Santa Clara, California
Hardware Developer
Senior Hardware Engineer
University of Southern California
Baylor University
Recommendations: 0
Computer Architecture
ModelSim
Cadence Virtuoso
Verilog
RTL design
VHDL
ASIC
Embedded Systems
Ameya Vaidya
Chief Co-ordinator
Santa Clara, California
Chief Co-ordinator
Summer Intern
Senior Hardware Engineer
Senior Hardware Engineer
Harvard Business School Online
Cornell University
VJTI
Recommendations: 0
Computer Architecture
RTL design
Digital Circuit Design
Athena
VHDL
Verilog
VLSI
Integrated Circuit Design
Gautam Venkatesh
Design Verification and Mixed-Signal Verification Engineering
Santa Clara, California
Design Verification and Mixed-Signal Verification Engineering
Verification Engineer
Design Automation Engineer
Summer Intern
Design Verification Engineer
Hardware Engineer
University of California, Berkeley
Mt. Carmel High School
Recommendations: 0
EDA
Mixed Signal
Verilog
IC
Analog
Functional Verification
VHDL
Microprocessors
Mahesh Srinivasan
Senior Data Scientist (Ads)
Santa Clara, California
Senior Data Scientist (Ads)
Staff Data Scientist and Analytics Manager (Ads)
Senior Staff Data Scientist (News Feed)
Senior Staff Engineer
Principal Engineer
Director of Data Science (Facebook News Feed & Stories)
Director of Data Science (Facebook News Feed)
Senior Staff Data Scientist (Ads)
Hardware Engineer
Stanford University
USC
Indian Institute of Technology, Madras
Recommendations: 0
Machine Learning
Convex Optimization
Python
R
Hive
Digital Control
Algorithms
Experimental Analysis
Oliver Bowen
Principal Digital Designer
Santa Clara, California
Principal Digital Designer
Project Electrical Engineer
Intern
Senior Hardware Engineer
Senior Hardware Engineer
VLSI Design Engineer
Digital Systems Engineer
Digital Design Engineer
Imperial College London
Lafayette College
Recommendations: 0
FPGA
Verilog
VHDL
C
Xilinx
Matlab
C++
Python
Elliott Hartingsveldt
Hardware Engineer
Santa Clara, California
Hardware Engineer
Hardware Design Intern
CSA Classification Intern
Mobile Robotics Hardware Intern
iPhone Hardware Intern
Hardware Design Intern
Test Fixture Engineering Intern
University of Waterloo
Recommendations: 0
Electronics
Signal Integrity
Analog
Hardware
Programming
RF
Processors
Simulations
Richard Wardlow
Software Developer / Technical Supervisor
Santa Clara, California
Software Developer / Technical Supervisor
Senior Embedded Software Engineer - Perceptual Computing Group
Perceptual Computing - RealSense 3D Camera Systems Engineer
Software and Hardware Engineer
Senior Experiential Developer
Freelance Software Developer
Computer Vision Systems Engineer
Senior Software Engineer - Visual Computing and Experiential Development
Software Developer / Senior Pipeline TD
Software and Hardware Engineer
Software and Hardware Engineer / Integration Architect
Software Developer / Technical Supervisor
Ringling College of Art and Design
Pinellas Technical Education Center-Clearwater
Recommendations: 0
Visual Effects
Nuke
Compositing
Maya
3D
Shaders
Texturing
Computer Animation
Benjamin Lee
Game Programmer
Santa Clara, California
Game Programmer
Hardware Engineer
Software Engineer
Graduate Student Researcher
Founder
iOS Engineer
Senior Software Engineer
University of California San Diego
University of California, Los Angeles
Recommendations: 0
C
Verilog
C++
Linux
Computer Architecture
IP
Perl
Debugging
Julie Chen
Staff Application Engineer
Santa Clara, California
Staff Application Engineer
Hardware Engineer
Zhejiang University
Zhejiang University
Recommendations: 0
Power Management
Analog
Analog Circuit Design
IC
Mixed Signal
Power Electronics
Semiconductors
PCB design
Sumit Ahuja
Research Intern
Santa Clara, California
Research Intern
Senior Architect
Graduate Technical Intern
Hardware Engineer
Summer Intern
Research Scientist (Intel Labs)
Research Intern
FAE
Virginia Tech
USI Università della Svizzera italiana
Indian Institute of Technology (Banaras Hindu University), Varanasi
Recommendations: 0
RTL design
VLSI
Hardware
Research
ASIC
EDA
VHDL
Verilog
David Cananzi
Technical Student
Santa Clara, California
Technical Student
Electrical Engineering Student
Hardware Designer (Co-op)
Hardware Intern
Summer Student
Sr. Hardware Engineer
Hardware Engineer
University of Waterloo
Recommendations: 0
Electrical Engineering
Electronics
Verilog
Analog Circuit Design
Embedded Systems
C
Amplifiers
Circuit Design
Parth Patel
Hardware Engineer
Santa Clara, California
Hardware Engineer
Embedded Software Engineer
New Product Development Engineer
Application Engineer
California State University-Northridge
IITE Ahmedabad, India
Recommendations: 0
Circuit Design
Electronics
Programming
Automation
Testing
Product Development
Embedded Systems
Embedded C
Hyunsoo Ha
Sensing Hardware Engineer
Santa Clara, California
Sensing Hardware Engineer
Senior Researcher
Researcher
Research/Teaching Assistant in Dept. of Electrical Engineering
Visiting Scholar
Pohang University of Science and Technology (POSTECH)
Pohang University of Science and Technology (POSTECH)
Recommendations: 0
Sensor Interface Circuit
Analog to Digital Converter
Analog Circuit Design
Mixed-Signal IC Design
Capacitance-to-Digital Converter
SAR ADC
Comparators
Changyu Sun
Interim Engineer Intern - Smartphone/Tablet Chipset Architecture Team
Santa Clara, California
Interim Engineer Intern - Smartphone/Tablet Chipset Architecture Team
Sr Hardware Engineer
Sr Hardware Engineer
System Engineer
Hardware Engineer
Michigan Technological University
UC Berkeley Extension
Recommendations: 0
Signal Integrity
Power Integrity
Matlab
C
Agilent ADS
Labview
Simulink
Signal Processing
Steve Chou
Development Systems Manager
Santa Clara, California
Development Systems Manager
Engineering Director, Tensilica Products, IP Group
Co-Founder
Founder
Hardware Engineer
Co-Founder
Stanford University
Recommendations: 0
Processors
Brian Vuong
Reliability Engineer, MTS
Santa Clara, California
Reliability Engineer, MTS
Firmware Engineer
Test Development and Sustaining Hardware Engineer
Senior Embedded Software Engineer
Embedded Software Engineer
California Polytechnic State University-San Luis Obispo
Recommendations: 0
Testing
ASIC
Semiconductors
Mixed Signal
Microsoft Office
VLSI
Engineering
Manufacturing
Aaron O'Brien
Senior Hardware Engineer
Santa Clara, California
Senior Hardware Engineer
Senior Systems Application Engineer
Senior Hardware Engineer
Hardware Test Engineer
Hardware Design Engineer
Hardware Design Engineer
Hardware Engineer
CIA Engineering Student Intern
California State University, Chico
Recommendations: 0
Hendra Soeleman
Hardware Engineer
Santa Clara, California
Hardware Engineer
Principal Hardware Engineer
Circuit Design Engineer
Technical Consultant
Co-Lead/Facilitator
Sr Circuit Design Engineer
Principal Consultant
Purdue University
The University of Texas at Austin
Recommendations: 0
Tom Swanson
Electrical Engineer
Santa Clara, California
Electrical Engineer
Hardware Engineer
Student Engineer Intern
Co-Founder and Developer
Hardware Design Engineer
University of Minnesota-Twin Cities
Recommendations: 0
PCB design
Test Automation
Schematic Capture
Embedded C
Hardware Architecture
Embedded Systems
Embedded Software
RTOS
Yu Shan
ASIC engineer
Santa Clara, California
ASIC engineer
Member of Technical Staff
Senior Staff Design Verification engineer
Senior Hardware Engineer
Senior ASIC engineer
Senior Hardware Engineer/Team Lead
Tsinghua University
Tsinghua University
Recommendations: 0
ASIC
Computer Architecture
RTL design
SystemVerilog
Verilog
Debugging
Functional Verification
FPGA
Ramam E.
Hardware Engineer
Santa Clara, California
Hardware Engineer
Lead DV Engineer
Engineering Manager
Verification Consultant
Staff Verification Engineer
SOC Verification Engineer
Principal Engineer
Sr. Principal Engineer
Senior IP Verification Engineer
Portland State University
Recommendations: 0
Kimihiko Sato
Senior SW Engineer
Santa Clara, California
Senior SW Engineer
Software Engineer
Senior Graphics Systems Software Engineer
Engineer
Self employed entrepreneur
Graphics Hardware Engineer
Senior SW Engineer
Software Engineer
SMTS Software Engineer
Senior Engineer
Queen's University
Campbell Collegiate
Recommendations: 0
GPU
H.264
Device Drivers
Debugging
Firmware
Embedded Systems
C++
Hardware
Arjuna Ekanayake
Principal Hardware Engineer
Santa Clara, California
Principal Hardware Engineer
Staff Design Engineer (CAE)
Engineering at Microchip
Principal Engineer
Sr. R&D Lead Product Engineer
Stanford University
University of Rochester
Recommendations: 0
SoC
Integrated Circuit Design
Perl
EDA
ASIC
FPGA
Verilog
Physical Design
Samson Joseph
Hardware Engineer
Santa Clara, California
Hardware Engineer
Senior Hardware Engineer
Graduate Teaching Assistant
University of California, Santa Barbara
Anna University
Recommendations: 0
Embedded Systems
Embedded C
Matlab
Verilog
C
C++
Simulations
Perl
Shaolei Quan
Hardware Engineer
Santa Clara, California
Hardware Engineer
Michigan State University
Michigan State University
Tsinghua University
Recommendations: 0
Eric Yam
Hardware Engineering intern
Santa Clara, California
Hardware Engineering intern
Hardware Design Engineering
Electrical/Mechanical Engineering Co-op
Engineering Product Manager Intern
Engineering Design Assistant
Advanced Systems Engineering Co-op
Hardware Engineer
University of Waterloo
Northern Secondary School
Recommendations: 0
Yuanhang Cao
Design Engineer
Santa Clara, California
Design Engineer
Hardware Engineer
Grader
University of Michigan
Wuhan University
Recommendations: 0
Anirudh Narayanan
Co-Founder
Santa Clara, California
Co-Founder
Associate Hardware Engineer
Intern
Associate, Digital McKinsey
Lead Applications Engineer
Engagement Manager
Co-Founder
Summer Intern - Operations Management, Supply Chain Team
Applications Engineer
CEO/Co-Founder
Yale University - Yale School of Management
Rose-Hulman Institute of Technology
Rose-Hulman Institute of Technology
Recommendations: 0
Sudhir Saligrama
Sr. Hardware Engineer
Santa Clara, California
Sr. Hardware Engineer
Design Verification Engineer(Consultant through Wipro)
Hardware Engineer
Pre-Silicon Verification Engineer
Design Verification Engineer(Contract)
ASIC Design Verification Engineer
Senior Design Verification Engineer
Sr.Verification Engineer
Design Engineer, FPGA
Senior Design Verification Engineer
Module lead
RMIT University
Gulbarga University
Recommendations: 0
Verilog
ASIC
SystemVerilog
FPGA
UVM
Xilinx
VMM
Functional Verification
Haifeng Li
Engineering Manager
Santa Clara, California
Engineering Manager
Sr. Camera System Design Engineer
System Engineer
Camera Hardware Engineer
Senior Optical Design Engineer
The PennState University
Tianjin University
Tianjin University
Recommendations: 0
Optical Engineering
Holography
Optical Imaging
CMOS image sensor
Camera module lens
Camera module image quality
Camera mobile imaging
Geometric optics
Kalyana Bollapalli
Sr. Hardware Engineer
Santa Clara, California
Sr. Hardware Engineer
Summer Intern
Graduate Research Assistant
Sr. Lead Physical Design Engineer
Graduate Teaching Assistant
Circuit Design Intern
Engineer
Physical Design Engineer
Texas A&M University
Indian Institute of Technology, Bombay
Matrusri Institute Of PG Studies
Recommendations: 0
Circuit Design
Low Power Design
Embedded C
System Architecture
RTL coding
Timing Closure
VLSI
Low-power Design
Denis Gudovskiy
Hardware Engineer / Wireless Communications Researcher (Summer Intern)
Santa Clara, California
Hardware Engineer / Wireless Communications Researcher (Summer Intern)
Hardware Engineer / Wireless Communications Researcher (Summer Intern)
Teaching Assistant
Senior Deep Learning Engineer
Hardware Engineer / Wireless Communications Researcher (Summer Intern)
Senior Algorithm Developer
Senior Wireless Engineer
Senior Systems Engineer
The University of Texas at Austin
Kazan National Research Technical University named after A.N.Tupolev – KAI
Recommendations: 0
Digital Signal Processors
FPGA
Embedded Systems
Verilog
Matlab
Signal Processing
Digital Signal Processing
Xilinx
Mikael Bengtsson
Hardware Engineer
Santa Clara, California
Hardware Engineer
Teaching Assistant
Teaching assistant
Hardware Engineer
The Institute of Technology at Linköping University
Högskolan i Kalmar
Recommendations: 0
Cadence Virtuoso
VHDL
Digital Electronics
FPGA
Simulations
VLSI
Matlab
Hardware Architecture
Zhong Shi
Principal Engineer
Santa Clara, California
Principal Engineer
Optical Research Scientist
Sensing System Hardware Engineer
Staff Engineer
Optical Simulation Engineer
The University of Texas at Austin
Beijing University of Post and Telecommunications
Shandong University
Recommendations: 0
Optics
fiber optics
diffractive optics
optical design
R&D
optical waveguide
Sensors
Simulations
Rui PhD
Hardware Engineer Staff, Silicon Photonics Development and Integration
Santa Clara, California
Hardware Engineer Staff, Silicon Photonics Development and Integration
Staff Process Engineer
Graduate Research Assistant
Guest Researcher
Graduate Teaching Assistant
Research Assistant
Stony Brook University
Tsinghua University
Tsinghua University
Recommendations: 0
Jithin Sankar
Senior FPGA Engineer
Santa Clara, California
Senior FPGA Engineer
Senior Hardware Engineer
Member Technical Staff
FPGA Engineer
Senior Hardware Engineer
Design Eng.
Senior Hardware Engineer
The University of Western Australia
RMIT University
Visvesvaraya Technological University
Recommendations: 0
Aravind Sundeep
Hardware Engineer
Santa Clara, California
Hardware Engineer
Lead Hardware Engineer
Design Engineer
Design Engineer
Design Engineer
Manipal Academy of Higher Education
NTTF Electronics Training center
Recommendations: 0
Jialun Lin
Software Development Engineer 2
Santa Clara, California
Software Development Engineer 2
Software Engineer
Hardware Engineer
Hardware Engineering Intern
Graduate student
Intern of Assistant Engineer
University of Michigan
UM-SJTU Joint Institute, Shanghai Jiao Tong University
Recommendations: 0
C++
Matlab
Assembly
VHDL
Xilinx
Cadence Virtuoso
LaTeX
Mathematica
James Germono
Principal Systems Engineer
Santa Clara, California
Principal Systems Engineer
Advance Systems & Test Engineer
Senior ILS Systems Engineer
Hardware Engineer
Sr. Application Developer
Sr Products Development Engineer
Prodct Test Enginer
Stanford University
California Polytechnic State University-San Luis Obispo
Recommendations: 0
Testing
Embedded Systems
Test Engineering
Linux
Engineering
Product Development
Test Equipment
C
Tzuchun Ku
Senior CAD Engineer
Santa Clara, California
Senior CAD Engineer
Principal Hardware Engineer
Sr. Staff Engineer
University of Southern California
Old Dominion University
Recommendations: 0
Sandhya S
Hardware @GoPro
Santa Clara, California
Hardware @GoPro
Hardware Engineer , New Devices Group, Intel
Hardware Development Engineer
Hardware Design Engineer
Digital Design Engineer
Masters Student
Student Intern
The University of Texas at Arlington
The University of Texas at Arlington
University of Kerala
Recommendations: 0
Ziyao Xu
ASIC Design Intern
Santa Clara, California
ASIC Design Intern
Senior Hardware Engineer
Hardware Design Engineer
Staff Engineer
Senior Firmware Engineer
Columbia University in the City of New York
Nanjing University of Aeronautics and Astronautics
Jinling High School
Recommendations: 0
Priyanka Sadananda
Hardware Engineer
Santa Clara, California
Hardware Engineer
Research Assistant
Research Assistant
student
Senior Hardware Engineer
Georgia Institute of Technology
Vellore Institute of Technology
Recommendations: 0
Digital Signal Processing
Digital Image Processing
Machine Learning
C/C++
Matlab
Computer Architecture
Embedded Systems
Verilog
Al Kariminou
Application Engineer FPGA Specilist
Santa Clara, California
Application Engineer FPGA Specilist
FPGA Application Consultant Engineer
Staff FPGA Engineer
Sr. FPGA Engineer (Contractor)
FPGA Engineer (Contractor)
Hardware Engineer
San Jose State University
Recommendations: 0
Philip Marraccini
Graduate Research Assistant
Santa Clara, California
Graduate Research Assistant
Graduate Research Assistant
Postdoctoral Researcher
Graduate Research Intern
Graduate Teaching Assistant
Optical Engineer
Depth Hardware Engineer
Senior Systems Engineer
Undergraduate Research Assistant
University College Cork
University of Central Florida
University of Central Florida
Recommendations: 0
Ryan L.
Staff Hardware Engineer
Santa Clara, California
Staff Hardware Engineer
ASIC Design Engineer
Electrical Engineer Intern
Student Affair IT Assistant
University of California, Berkeley
University of California, Los Angeles
Recommendations: 0
C++
C
Electrical Engineering
Programming
Matlab
Circuit Design
SystemVerilog
Perl
Julian James
Co-op
Santa Clara, California
Co-op
Network Hardware Enginee
Staff Hardware Design Engineer
Hardware Engineer
University of the Pacific
Cosumnes River College
Recommendations: 0
Linux
Ethernet
Electrical Engineering
C
C++
VHDL
Verilog
Microsoft Excel
John DeBusscher
Senior Hardware Engineer
Santa Clara, California
Senior Hardware Engineer
Senior Hardware Design Engineer
Project Manager Team Lead
Electrical Engineer
Engineering Intern
Senior Electrical Design Engineer
University of Southern California Viterbi School of Engineering
University of Michigan College of Engineering
Recommendations: 0
Tianhao Li
iPhone System Design Engineer
Santa Clara, California
iPhone System Design Engineer
Hardware Design Engineer -- BMS
Hardware Engineer & Mobile Application Developer Intern
Power/Analog Electronics Design Engineering Intern
President
Hardware Design Engineer Lead -- BMS
Mobile Application Developer Intern
Research and Development Engineer Intern
Graduate Teaching Assistant
Georgia Institute of Technology
Georgia Institute of Technology
No.1 High School of Zhengzhou
Recommendations: 0
RF Engineering
Analog/Digital IC Design
Wireless Communications...
Matlab
C++
Signal Processing
Digital Signal...
Data Analysis
Yiou Li
Senior Hardware Engineer
Santa Clara, California
Senior Hardware Engineer
Senior Principal Hardware Engineer
Principal Hardware Engineer
Duke University
Duke University
Recommendations: 0
Perl
System Architecture
SPARC
X86
Solaris
Unix
Verilog
Embedded Systems
Kevin Lee
Hardware Engineer
Santa Clara, California
Hardware Engineer
Web App Developer
Software Engineer
Software Engineer
Student
Stanford University
UC Berkeley
De Anza College
Recommendations: 0
C
Matlab
Research
Microsoft Office
Statistics
Public Speaking
Data Structures
Java
Amber Sun
Sr Camera Systems Lead
Santa Clara, California
Sr Camera Systems Lead
Staff Camera Hardware Engineer
Lead Camera Hardware Engineer
Recommendations: 0
Testing
Characterization
Device Characterization
Yield Analysis
Failure Analysis
Optics
Semiconductors
MEMS
TANMAY S.
Hardware Engineer
Santa Clara, California
Hardware Engineer
Signal Integrity Engineer
Hardware Engineering Co-op
Technical Advisor
Analog/ Mixed Signal IC Design & Test Engineer (Graduate Research Assistant)
Hardware Design and Test Engineer (Graduate Research Assistant)
Rochester Institute of Technology
University of Mumbai
Bharati Vidyapeeth
Recommendations: 0
Electronics
Electronics Hardware Design
Industrial Control
PLC
SCADA
Embedded Systems
Control Systems Design
PCB layout design