Po-Kang ChenSenior Hardware Design Engineer
Fremont, California
Senior Hardware Design Engineer
Non-linear Software based on function module with “Traceability” and “Maintenance”
National Science Council Research Assistant
Re-configure architecture of FPGA
lead reseacher
Algorithm Software Engineer
Reversible logic synthesis tool.
lead reseacher
Software Engineer
IC design Manager
National Science Council Research Assistant
National Science Council Research Assistant
Robei LLC: Super CMOS spice stimulation
High speed all computer inferred chip disign with Reversible logic tool design
Engineer in Standard Cell synthesis
Northwestern Polytechnic University
Southern Taiwan University of Science
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C++
Verilog
PHP
VHDL
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C
FPGA