Top ASIC Verification Engineers in Cupertino, California

Benjamin Wang
Electrical Engineer
Cupertino, California
Electrical Engineer
ASIC Verification Engineer Intern
Mac Student Technician
Electrical Engineering Intern
Graduate Teacher's Assistant
Electrical Engineer
California Polytechnic State University-San Luis Obispo
California Polytechnic State University-San Luis Obispo
Recommendations: 0
MATLAB
Simulink
Mathematica
VHDL
PSpice
Maple
Java
C++
Sanjay Prabhu
Sr. Design Verification Engineer
Cupertino, California
Sr. Design Verification Engineer
On site Verification Lead (Consultant)
ASIC Verification Lead
Sr. ASIC Verification Engineer
ASIC Verification Engineer
Indian Institute of Technology, Roorkee
University of Mumbai
S.H.J Polytechnic, Maharashtra University
Recommendations: 0
SystemVerilog
Functional Verification
ASIC
SoC
Verilog
VLSI
C
Perl