Sanjay PrabhuSr. Design Verification Engineer
Cupertino, California
Sr. Design Verification Engineer
On site Verification Lead (Consultant)
ASIC Verification Lead
Sr. ASIC Verification Engineer
ASIC Verification Engineer
Indian Institute of Technology, Roorkee
University of Mumbai
S.H.J Polytechnic, Maharashtra University
Recommendations: 0
SystemVerilog
Functional Verification
ASIC
SoC
Verilog
VLSI
C
Perl