Strong background of LCD, CRT Display Field

Strong RTL (Verilog, VHDL) coding from high level Algorithm

Developing RTL code for FGPA (Altera,Xilinx) and Synthesis

FPGAs in both end-product implementaion and FPGA-based ASIC Prototyping

ModelSim, Altera Quartus II, Xilinx ISE

Working knowledge with digital scopes, logic analyzers and other test equipment

debugging and troubleshooting

Verilog